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Logic Gate: Building 0s and 1s

Pair the transistor with its opposite to make CMOS NOT and NAND from power-side and ground-side nets, build any logic from NAND alone, add 1 + 1 = 10, watch the carry ripple through eight adders, and pull back to a sea of gates.

Prologue · 1/6

WaferDieBlockWiringTransistorFinAtom

Two that face each other

Take the single transistor from the previous chapter and pair it with another. One is n-type, which conducts with electrons; the other is p-type, which conducts with holes — opposite characters. The same gate voltage opens one and closes the other. Put the p-type on the power side (VDD) and the n-type on the ground side (GND), take the output from the middle, and an input of 0 fills the output from the supply to make 1, while an input of 1 drains it to ground to make 0. Two transistors, and you have NOT, which flips its input.

Switch input A between 0 and 1, and watch only one of the two paths open as the output fills or drains.

Output: 1